Z80 Instruction Set Reference | Code Like It's 198x

Complete reference for Z80 microprocessor instructions as used in the ZX Spectrum. Includes T-states (clock cycles), byte counts, and flag effects for every instruction.

Reading This Reference

Notation

n = 8-bit immediate value (0-255)
nn = 16-bit immediate value (0-65535)
d = 8-bit signed displacement (-128 to +127)
r = 8-bit register (A, B, C, D, E, H, L)
rr = 16-bit register pair (BC, DE, HL, SP)
(addr) = memory at address
$ = current address (in expressions)

Flag Notation

S = Sign flag (bit 7 of result)
Z = Zero flag (result is zero)
H = Half-carry flag (carry from bit 3 to 4)
P/V = Parity/Overflow flag
N = Add/Subtract flag (for BCD)
C = Carry flag
● = Flag affected
○ = Flag reset
— = Flag unchanged
? = Flag undefined

8-Bit Load Instructions

LD r,n - Load Immediate

Load 8-bit value into register.

Instruction	Bytes	T-states	S	Z	H	P/V	N	C
LD A,n	2	7	—	—	—	—	—	—
LD B,n	2	7	—	—	—	—	—	—
LD C,n	2	7	—	—	—	—	—	—
LD D,n	2	7	—	—	—	—	—	—
LD E,n	2	7	—	—	—	—	—	—
LD H,n	2	7	—	—	—	—	—	—
LD L,n	2	7	—	—	—	—	—	—

Example:

LD A,42          ; A = 42
LD B,0           ; B = 0
LD H,$40         ; H = $40 (64 decimal)

Note: LD instructions do not affect flags.

LD r,r’ - Load Register to Register

Instruction	Bytes	T-states	Flags
LD A,B	1	4	None affected
LD B,C	1	4	None affected
LD H,L	1	4	None affected

All 49 combinations: A,B,C,D,E,H,L can be copied to/from each other.

LD r,(HL) - Load from Memory

Load register from memory address in HL.

Instruction	Bytes	T-states	Flags
LD A,(HL)	1	7	None affected
LD B,(HL)	1	7	None affected
LD C,(HL)	1	7	None affected

LD (HL),r - Store to Memory

Store register to memory address in HL.

Instruction	Bytes	T-states	Flags
LD (HL),A	1	7	None affected
LD (HL),B	1	7	None affected
LD (HL),n	2	10	None affected

16-Bit Load Instructions

LD rr,nn - Load 16-bit Immediate

Instruction	Bytes	T-states	Flags
LD BC,nn	3	10	None affected
LD DE,nn	3	10	None affected
LD HL,nn	3	10	None affected
LD SP,nn	3	10	None affected
LD IX,nn	4	14	None affected
LD IY,nn	4	14	None affected

Arithmetic Instructions

ADD A,r / ADD A,n - Add

Instruction	Bytes	T-states	S	Z	H	P/V	N	C
ADD A,B	1	4	●	●	●	●	○	●
ADD A,n	2	7	●	●	●	●	○	●
ADD A,(HL)	1	7	●	●	●	●	○	●

SUB r / SUB n - Subtract

Instruction	Bytes	T-states	S	Z	H	P/V	N	C
SUB B	1	4	●	●	●	●	●	●
SUB n	2	7	●	●	●	●	●	●

INC r / DEC r - Increment/Decrement

Instruction	Bytes	T-states	S	Z	H	P/V	N	C
INC A	1	4	●	●	●	●	○	—
DEC A	1	4	●	●	●	●	●	—

Note: Carry flag is NOT affected by INC/DEC!

16-Bit Arithmetic

ADD HL,rr - 16-bit Add

Instruction	Bytes	T-states	S	Z	H	P/V	N	C
ADD HL,BC	1	11	—	—	●	—	○	●
ADD HL,DE	1	11	—	—	●	—	○	●
ADD HL,HL	1	11	—	—	●	—	○	●
ADD HL,SP	1	11	—	—	●	—	○	●

Important: Only HL can be the destination for 16-bit ADD!

INC rr / DEC rr - 16-bit Increment/Decrement

Instruction	Bytes	T-states	Flags
INC BC	1	6	None affected
DEC HL	1	6	None affected

Important: 16-bit INC/DEC do NOT affect any flags!

Logical Instructions

AND r / AND n - Logical AND

Instruction	Bytes	T-states	S	Z	H	P/V	N	C
AND B	1	4	●	●	●	●	○	○
AND n	2	7	●	●	●	●	○	○

OR r / OR n - Logical OR

Instruction	Bytes	T-states	Flags
OR B	1	4	S,Z,P/V affected, H,N,C reset
OR n	2	7	S,Z,P/V affected, H,N,C reset

OR A idiom: Sets zero flag without changing A.

XOR r / XOR n - Logical XOR

Instruction	Bytes	T-states	Flags
XOR B	1	4	S,Z,P/V affected, H,N,C reset
XOR n	2	7	S,Z,P/V affected, H,N,C reset

XOR A idiom: Fastest way to set A to zero (4 T-states vs LD A,0 = 7 T-states).

CP r / CP n - Compare

Like SUB but doesn’t store result (only sets flags).

Instruction	Bytes	T-states	Flags
CP B	1	4	S,Z,H,P/V,N,C affected
CP n	2	7	S,Z,H,P/V,N,C affected

Jump Instructions

JP nn - Unconditional Jump

Instruction	Bytes	T-states	Flags
JP nn	3	10	None affected
JP (HL)	1	4	None affected

JP cc,nn - Conditional Jump

Condition	Meaning	Instruction	Bytes	T-states
Z	Zero	JP Z,nn	3	10
NZ	Not zero	JP NZ,nn	3	10
C	Carry	JP C,nn	3	10
NC	No carry	JP NC,nn	3	10

JR d - Relative Jump

Instruction	Bytes	T-states	Flags
JR d	2	12	None affected
JR Z,d	2	12/7	None affected
JR NZ,d	2	12/7	None affected

Range: -126 to +129 bytes from current position.

DJNZ d - Decrement and Jump if Not Zero

Special loop instruction. Decrements B and jumps if B ≠ 0.

Instruction	Bytes	T-states	Flags
DJNZ d	2	13/8	None affected

Perfect for counted loops!

Call and Return Instructions

CALL nn - Unconditional Call

Instruction	Bytes	T-states	Flags
CALL nn	3	17	None affected

RET - Return from Subroutine

Instruction	Bytes	T-states	Flags
RET	1	10	None affected
RET Z	1	11/5	None affected
RET NZ	1	11/5	None affected

Stack Instructions

PUSH rr - Push to Stack

Instruction	Bytes	T-states	Flags
PUSH BC	1	11	None affected
PUSH DE	1	11	None affected
PUSH HL	1	11	None affected
PUSH AF	1	11	None affected

POP rr - Pop from Stack

Instruction	Bytes	T-states	Flags
POP BC	1	10	None affected (except POP AF)
POP AF	1	10	All flags loaded from stack

I/O Instructions

IN A,(n) - Input from Port

Instruction	Bytes	T-states	Flags
IN A,(n)	2	11	None affected

OUT (n),A - Output to Port

Instruction	Bytes	T-states	Flags
OUT (n),A	2	11	None affected

IN r,(C) - Input using BC

Instruction	Bytes	T-states	Flags
IN A,(C)	2	12	S,Z,P/V affected, H,N reset

Block Instructions

LDIR - Load, Increment, Repeat

Instruction	Bytes	T-states	Flags
LDIR	2	21/16	H,P/V,N reset

Operation: Copy byte from (HL) to (DE), increment HL and DE, decrement BC. Repeat until BC = 0.